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Working at High
Speed: High-speed data
acquisition requires fast and accurate signal
conditioning. The technology is there--you just have to
know how to use it. Muneeb Khalid, Gage Applied Sciences Inc.
16-Bit
A/D Conversion
A/D converters (ADCs) change real-world analog signals into digital code that computers can understand and analyze. The idea is to divide a full-scale range into a finite number of quantization levels and estimate the amplitude of the analog signal to the closest level (see Figure 1). Because computers "see" data in binary form, the total number of quantization levels is always a multiple of 2. The inverse-log (to the base 2) of the number of quantization levels is called A/D resolution. For example, the most common A/D resolution for high-speed measurements is 8 bits, which implies that there are a maximum of 28, or 256, quantization levels. A 16-bit A/D conversion has 216, or 65,536, quantization levels in the full-scale range. A quantization level is also referred to as an LSB, which stands for the least significant bit of the digital code.
Common
Misconceptions Remember, every electronic device must contend with ambient noise and the nonideal nature of electronics. ADCs are no different. To prove this point, use any ADC to digitize a stable, ultralow-noise DC signal (e.g., ground the input). You'll notice substantial chatter in the output codes. For a 12-bit device, the chatter can be as much as 8 LSBs, and for a 16-bit device, 22 LSBs. This shows one simple source of error in the A/D process: noise. Because of overall system noise, the instantaneous A/D conversion may be off by as much as 8 LSBs on a 12-bit system. Another misconception arises from the Nyquist theorem, which states that to accurately digitize an analog signal, the ADC must sample the signal at twice the highest frequency component in the signal. It's not uncommon for users to believe that this oversampling will result in a smooth reconstruction of the analog signal in the time domain. The fact of the matter is that oversampling at this rate will result in a jagged signal if it is recreated in the time domain (see Figure 2). The Nyquist theorem states only that the frequency content of the analog signal can be extracted; it does not say that the signal shape can be extracted. For that, a higher level of oversampling must be performed. The general rule of thumb in the instrumentation industry is that a signal must be oversampled at least five to eight times for a good time domain reconstruction. The higher the oversampling, the better. What
Makes High-Speed ADCs Different?
other nonlinearities. For example, if the input bandwidth is limited to a few hundred kilohertz, virtually none of the high-speed digital crosstalk gets into the signal path—most of it is filtered out by the low input bandwidth. Nonlinearities in the input sample-and-hold amplifiers become apparent only when the input frequencies go beyond a few megahertz. It's easier to design a low-distortion amplifier if the bandwidth is <1 MHz because the amplifier is being used well below its specifications (see Figure 3). The
Technology
This approach follows a multistep A/D conversion process:
Error correction compensates for nonlinearities or offset and gain errors in the sample-and-hold amplifiers or the flash A/D converters. Because of the high speed of the device, most of the digital circuitry has been implemented using Emitter Coupled Logic (ECL) technology, which allows for high switching speed and lower digital noise at the expense of higher power consumption. This multistep procedure requires more than one clock cycle. Because of this, A/D conversion with such a device involves a pipeline in which output code appears a few clock cycles after the first sample and hold takes place (see Figure 5). A corollary to this is that the sampling clock must be continuous, at least within a certain range, for the pipeline to operate properly. If the clock is not continuous, the sample-and-hold amplifiers can go into saturation, which can cause A/D conversion quality to deteriorate.
Sources
of Error Traditional Sources. These sources are differential non linearity (DNL), integral non linearity (INL), accuracy, offset error, gain error, thermal noise, and quantization error. All these cause noise in both low- and high-speed A/D systems. Unique Error Sources. These sources cause a negligible error in low-speed A/D conversion and therefore are safely ignored when such devices are characterized. In high-speed devices, however, the sources become a significant, and sometimes dominant, source of error. Clock Jitter. The RMS clock jitter multiplies with the slew rate of the input signal to create an uncertainty in the measurement, which reflects
as noise both in the time and frequency domains (see Figure 6). The simplest way to discover if clock jitter is a significant portion of the noise is to monitor the deterioration of the SNR as the input frequency is increased. Digital Crosstalk. An A/D converter is by definition a mixed mode device: it contains both digital and analog components. Crosstalk from the digital section into the analog portion is inevitable. However, good design techniques must be used to minimize crosstalk. Power Supply Noise. Switching power supplies is a necessary evil that today's high-resolution A/D systems must contend with. The noise feeds through the power supply rails of the semiconductor devices into the signal or ground path of the analog signal. Once again, good design techniques can limit the effect of this noise. EMI. Interference from emissions from other devices can also feed into the A/D system. You can use RF shielding to protect the preamplifier section, but the largest gain in protection against EMI has been achieved by using multilayered printed circuit boards that can shield analog signals in between ground planes. Amplifier Distortion. The more amplifiers you have in the signal path, the more noise and distortion you'll have in the signal. This behavior is most obvious in the multimegahertz frequency range. Although you should make every effort to design low-noise, low-distortion amplifiers, understand that they will never be perfect. Amplifier Nonlinearity. The nonlinearity of input amplifiers becomes apparent at higher frequencies. This source of error can cause strange frequency products to appear in the measured spectrum when the input is multitone (i.e., the input consists of more than one frequency). Good design techniques can virtually eliminate nonlinearities in an amplifier. Parameters
of Interest To address this need, engineers and scientists have specified test parameters for high-speed A/D conversion that use FFTs to quantize the sources of error in the frequency domain. These parameters, referred to as dynamic parameters, are designed to measure all the sources of error in the A/D system. The following are the most important and widely used parameters. SNR. This parameter is the ratio of RMS power of the fundamental signal to RMS noise (excluding harmonics). RMS fundamental signal: RMS noise:
Where: n = number of A/D bits Total Harmonic Distortion (THD). THD is the ratio of RMS sum of all the harmonics to RMS of the fundamental signal:
SNR and Distortion (SINAD). SINAD is the ratio of the RMS of the fundamental signal to RMS noise (including harmonics):
Spurious Free Dynamic Range (SFDR). SFDR is the usable dynamic range indicating to the user where no other frequency components—except the fundamental frequency—exist in the range. This indicates the largest harmonic (worst-case harmonics), spurious frequency, or noise component relative to the input level. Measurement
Techniques SNR Analysis. SPEC performs this analysis, which includes measurement of SNR, ENOB, THD, SINAD, and SFDR. An array containing the data output by the A/D converter is required to perform the analysis. Generally, three different methods can be used to obtain the data:
Before you can analyze the data you have obtained, you must apply a windowing function to minimize the error resulting from spectral leakage. The next step is to perform an FFT, which will transform the time domain data obtained from the A/D converter into frequency domain data. The frequency domain data can be used to calculate dynamic parameters, such as SNR, ENOB, THD, SINAD, and SFDR. To obtain SNR, ENOB, THD, and SINAD, some important parameters are required. These parameters can be calculated from the results of the FFT. The parameters include fundamental volume, floor noise volume, total noise volume, and harmonics volume. Fundamental volume is the sum of all the fundamental bins. The number
of bins included as the fundamental volume is determined by the leakage limit of the FFT windowing function. For example, if the leakage limit is 10, 20 bins will be considered to be the fundamental bins. Table 1 shows the standard usage of leakage limit for a 2048-point FFT. Harmonics volume is the sum of the bins in all the harmonics. Because the harmonic usually gets weaker as it gets farther from the fundamental,
only a certain number of harmonics are considered as harmonics volume. Table 2 shows the relationship between the fundamental frequency and the number of harmonics considered as the harmonics volume. Similar to the fundamental volume, the number of bins included as the harmonics volume is determined by the leakage limit of the FFT windowing function. Floor noise volume is the sum of all the bins that are not in either the fundamental or harmonics volumes. Total Noise Volume is the sum of all the bins that are not the fundamental bins. SNR, ENOB, THD, and SINAD are then calculated according to the following formulae:
SFDR (in dB) = Fundamental Peak Value - Second Highest Peak Value Conclusion Muneeb Khalid is President of Gage Applied Sciences Inc., 2000 32nd Ave. Lachine, Montreal, PQ, Canada H8T 3H7; 800-567-4243, 800-780-8411, prodinfo@gage-applied.com or www.gage-applied.com
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emand for high-speed,
high-resolution signal analysis is pushing 16-bit A/D
conversion speeds beyond the traditional 1 MHz barrier.
Such data conversion requires sophisticated technology
and test methodology because traditional DC
characterization is not up to the task. Proper
characterization of true 16-bit A/D conversion also
challenges many traditional data acquisition (DA)
hardware manufacturers who would have you believe that
their devices are absolutely accurate—despite the
laws of physics.
Figure 1.
A/D conversion is the process by which
the amplitude of an analog signal is
converted to an n-bit binary
representation, allowing computers to
manipulate the data.
Figure 2.
Although the Nyquist theorem suggests
that the frequency content of a signal
can be extracted by sampling at twice the
input frequency, much higher oversampling
is required to properly reconstruct the
signal in the time domain.
Figure 3.
Semiconductor technology limits the
performance (resolution, distortion,
noise) of A/D devices as their sampling
frequency goes beyond 1 MHz. It's easier
to build a low-frequency A/D converter
than a fast one.
Figure 4.
A multistage architecture allowes Gage
engineers to resolve the performance
issues at 10 Msps. Error-correction
circuitry solves gain and offset errors
and linearizes the A/D conversion
process.
Figure 5.
To allow multistage A/D conversion, the
data path inside the converter must be
pipelined. This places a limit on the
minimum clock frequency (i.e., 2.5 Msps)
the device can operate at.
Figure 6.
Fast A/D conversion requires low clock
jitter (i.e., <2 ps rms) if high
performance is to be maintained. The
jitter multiplies with the input slew
rate to create a noise component never
seen in lower-frequency A/D converters.
t (where 
2 
