Sensors That Can Take the Heat
Part 1: Opening the High-Temperature toolbox
Demand for high-temperature-tolerant electronics for sensor-based systems is growing faster than the industry can develop the technology. With few commercially available semiconductor choices suitable for these applications, it’s still a work in progress.
Jay Goetz,
Honeywell SSEC
It’s not easy to find electronic components and materials that can survive—let alone function in—high-temperature environments. To create sensor-based systems for these environments, designers have to deliver implementations that tolerate mechanical stresses, chemical reactivity, and performance degradation. And if these challenges weren’t enough, high-temperature-tolerant distributed sensing and control architectures must provide enhanced communications, battery operation, precision, and operating life (see the sidebar “Market Outlook,”).
Applying traditional electronics design methodology to high-temperature applications offers limited success. To build a system that can withstand these temperatures and provide the performance you’re looking for, you have to get standard components to work in these conditions, find high-temperature-tolerant components and materials that are already on the market, package circuits to function properly under harsh conditions, develop new guidelines for circuit design, and create packaging solutions that reduce cost and size.
High-Temperature Effects on Conventional Electronics
Market Outlook
Industry analysts estimate that the market for high-temperature-tolerant electronics will reach $15 billion in the next couple of years. Currently, though, the market is quite a bit smaller—about $1 billion—because of component scarcity, component cost, the lack of semiconductor fabrication facilities capable of producing these devices, and immature packaging and materials technology.
Exceeding Specifications. Recent changes in the requirements of downhole instrumentation, turbine engine control architecture, industrial process control, and internal combustion engine control have pushed the operating temperature range higher, forcing designers to use commercial parts in ways they were never meant to be used (see Table 1 and the sidebar “Applications of Interest,”). Low-temperature commercial off-the-shelf (COTS) electronics are designed for upper temperature limits of 70ºC for commercial applications, 85ºC for industrial use, and 125ºC for military applications. But these products are increasingly unable to handle the growing demands.
Manufacturers don’t recommend using COTS components beyond their intended range, but in some cases, they do screen the components for use in higher temperatures. Applications requiring thermal cycles over wide temperature extremes cause package stress and increase the difficulty of creating a stable, reliable design. Capacitors, crystals, diodes, and transistors also have difficulty at high temperatures. Component producers can more easily make magnetics compatible with high temperatures if they use the right materials.
TABLE 1
Market
Downhole Instruments
175-225
>2
1-2
Data sheet
150-225
40
1-2
Data sheet
250-300
Up to 8
2-3
Data sheet
Turbine Engine
200-300
40-80
5-10
Source control drawing
225-250
8-40
2-5
Source control drawing
Internal Combustion Engine
>150
5
4
QS9000
>150
20
4
QS9000
Some designers of high-temperature systems are willing to do the extra work necessary to characterize components to find the most durable brands, but this is a costly venture, requiring burn-in equipment and test expertise. And even then, the results aren’t always repeatable, because the component manufacturer can make changes to its process that can alter the product’s temperature performance.
Even without changes to the basic IC design, process tolerances from lot to lot can fall outside what the self-testing OEM can hope to see by examining a few samples. Unless statistically valid data indicate that a component can be trusted to operate over time in high temperatures, the part
may be the one that fails and takes out the whole system. Ironically, it’s often components made using older technologies that have the best high-temperature performance. Unfortunately, most of these parts are obsolete because of semiconductor designs that yield more parts per fabricated wafer.
Figure 1. The two sets of curves show how bipolar transistor characteristics vary with temperature. In this figure, a bipolar transistor is shown at 27°C and at 277°C. Not only is the gain dramatically reduced, but you find a lot of distortion and loss of linearity at high temperatures. Note that the output resistance is not constant.
A recent evaluation by an OEM customer of Honeywell compared COTS components screened for high-temperature operation with components specifically designed for operation above 200ºC. The commercial components—despite being chosen for high-temperature use and even receiving a short burn-in—began failing at about 150 hr. of operation at 210ºC. The silicon-on-insulator (SOI) components continued to operate until power was removed at 700 hr.
Bipolar Technology. Typically, amplifiers must have low offset, high impedance, and high gain to minimize errors in a control loop. Unfortunately, bipolar junction transistors, which are typically used for these reasons, don’t work well at high temperatures because of:
• Forward current gain increases with temperature at about 30%/100ºC
Applications of Interest
The industries most interested in designing products using sensors with high-temperature-tolerant electronics today fall into three areas:
• Downhole instruments require embedded sensors and high-temperature-tolerant electronics for drilling, logging, and monitoring in deep oil, gas, and geothermal wells.
• Turbine engines used in aircraft and power-generation facilities need high-temperature-tolerant sensors and electronics to implement remote sensing and distributed control systems and perform system health monitoring.
• Automobiles and trucks need these sensors and electronics on and sometimes in the engine, transmission, brakes, exhaust, and other systems.
Additional markets are emerging in integrated motor controls, industrial process controls, and environmental test equipment.
• Forward voltage decreases at about 200 mV/100ºC
• Reverse leakage of the base/collector junction with open emitter doubles every 8ºC
• Resistivity of Si, which is temperature dependent
• A loss of linearity that occurs in the saturation region with temperature increase
Increasing leakage current, often the dominant error, eventually causes loss of rectification and isolation. Bipolar circuits start to fail above 150ºC. In the bipolar transistor characteristics shown in Figure 1, not only is the collector current dramatically reduced, but there is significant distortion and loss of linearity at high temperatures. Also, the output resistance is not constant.
CMOS Technology. At high temperatures, CMOS devices also experience reduced performance. Unfortunately, most devices aren’t tested above 150ºC.
Characterization testing of a typical MOSFET device in the range of 100ºC–200ºC indicates that:
• Breakdown voltage increases with temperature at about 8%/100ºC
• on resistance increases with temperature at about 70%/100ºC
• Leakage current increases rapidly with temperature, changing four orders of magnitude/100ºC—doubling every 8ºC
• Gate-source threshold voltage decreases with temperature about 24%/100ºC
Conventional CMOS and MOSFET devices usually operate to 160ºC. With dielectric isolation, this limit can be extended to about 200ºC, and when designed for high temperature, to about 300ºC.
Figure 2. The graph shows the drain current in a discrete, low-temperature MOSFET transistor at 25°C, 200°C, and 300°C, as the gate voltage varies (2N4351). Notice how the Id/Vgs slope decreases with temperature and how the saturation current decreases with temperature while the leakage (at Vgs = 0 V) becomes significant above 200°C. The threshold voltage, Vth —defined as the value of gate voltage for which Id is 1% of the saturation current—also decreases with temperature and the leakage current at Vgs = 0 V and becomes noticeably larger above 200°C. There is a temperature-stable bias point at Vgs = 4.2 V. This bias point is unique for MOSFETs (it doesn’t exist for bipolar transistors), and it is sometimes useful in circuit design to minimize offset drift.
The standard bulk silicon process diffuses N- or P-type sources and drains into lightly doped substrate, which is typically grounded. An oxide-isolated gate is then deposited between and above the source and drain. Current flows in a channel from source to drain when a voltage greater than Vt is applied to the gate. The gate voltage thus controls the conductance of the channel.
The simplified expression for the drain current, Id, is given as:
Id ~ Kµc (Vgs– Vt)2 (1)
where:
µc = the channel mobility, which de- creases with temperature
Vt = decreases with temperature
Thus, Id decreases with temperature for a given Vgs , as shown in Figure 2.
Note that there is a temperature-stable bias point at Vgs = 4.2 V. This is unique for MOSFETs (it doesn’t exist for bipolar transistors) and is sometimes useful in circuit design to minimize offset drift.
MOSFET devices are also greatly affected by reverse junction leakage over temperature. The drain in an N-MOSFET is reverse-biased with respect to the substrate, and reverse bias leakage paths exist from drain to source. These leakage currents (see Figure 3) increase exponentially with temperature to the point where Id is no longer controlled effectively by the gate.
Figure 3. The two main low-temperature MOSFET leakage paths run from the drain to the substrate and to the source. These currents are caused by thermally generated carriers, which vary exponentially with temperature according to the equation: NT3/2exp(–Eg/2kT).
Leakage paths between adjacent devices can also be a source of latchup. If the source of a P-MOSFET, for example, has sufficient leakage to the drain of an adjacent N-MOSFET, a parasitic pnpn structure exists, which is the basic structure of a thyristor. Manufacturers avoid this problem by minimizing the parasitic current transfer efficiencies, a, between devices and by reducing the reverse collector currents. Conventional CMOS devices can have inadequate design margins in the values of a and don’t have adequate device isolation for high-temperature use. For this reason, trench isolation of devices or SOI technology is used.
Leakage current in a silicon n+p junction is given as:
I(T) = qA
{[(Dn/tn)ni2(T)]/Na} + qAni(T)W/te (2)
where:
A = area of the junction
q = electronic charge
Dn = electron diffusion constant
tn = electron lifetime in P-type silicon
W = depletion width
te = effective lifetime of the thermal gen eration process in the deple tion region
Na = dopant acceptor density
TABLE 2
Technology
Maturity
Temperature range
Sourced
roducts
Is CMOS (bulk)
Production
Memory,Power
Hight-Temperature-Tolerant Is (SOI)
Production
-50ºC to 300ºC
Honeywell
Sensor I/F, Logic,
Memory,Power
E/D GaAs
Production
-50ºC to 150ºC
Vitesse
logic, Memory
Complimentary
Development
-50ºC to 350ºC
Honeywell
Logic, Power
SIC (Silicon carbide)
Development
-50ºC to 600ºC
CREE, Siemens, ABB
Very Few (Discretes)
Diamond
Early development
-50ºC to 1000ºC
Research labs
None
*Source: HiTEN, London, England (www.hiten.com).
The first term of Equation (2) describes the diffusion process, which dominates the leakage increase above 150ºC, and because the intrinsic carrier density, ni(T), increases as follows:
ni(T) = CT3/2exp(–Eg/2KT) (3)
where:
C = constant
Figure 4. These two curves compare leakage currents in bulk and SOI NMOS transistors. Depending on device design, the difference in leakage between the two transistors is from 2 to 4 orders of magnitude.
T = temperature
K = Boltzmann’s constant
Eg = energy bandgap, which is tempera- ture dependent
The leakage current increases exponentially with temperature.
You can reduce leakage current by using a material with higher Eg, decreasing the junction area, or increasing the doping density (which also reduces the breakdown voltage).
Figure 4 shows a comparison of bulk and SOI N-channel transistor drain leakage currents. Figure 5 shows how threshold voltages in SOI devices tend to decrease (or increase) at a rate of –2.5 mV/ºC for NMOS (or 3 mV/C for PMOS). Devices designed for high temperature adjust these thresholds higher to prevent them from going to 0 V at high temperatures and allowing excessive current to flow in the off state.
Semiconductor Technologies
There are few commercially available semiconductor choices suitable for use at high temperatures. In fact, as Table 2 shows, Si is the only technology that demonstrates good high-temperature characteristics and is mature enough for production use.
As temperature increases in a packaged semiconductor, several issues arise that must be dealt with:
• Intrinsic carrier density increases
• Junction leakage current increases
SOI Offerings
The advantages of SOI material have also proved useful for:
• Radiation-hardened applications, where radiation-induced carriers can cause problems similar to high temperature
• Low-power operation, because of lower parasitic capacitance and lower allowable digital rail voltages
• Faster circuits, also because of the lower capacitance
• Better latchup immunity, allowing higher packing densities
• Better mixed-mode performance due to minimal cross-talk
• Device parameters vary
• Electromigration of interconnection traces increases
• Chemical reactivity of ohmic contacts increases
• Dielectric breakdown strengths decrease
• Temperature coefficient expansion mismatches stress die mechanically
The most important physical properties for a good high-temperature semiconductor material are a wide bandgap and high thermal conductivity. This is because bandgap determines the amount of leakage current flowing across the junction and because thermal conductivity determines the semiconductor’s ability to dissipate heat to the ambient environment.
Figure 5. These two curves represent the variation of N Channel and P Channel SOI transistor threshold voltage with temperature. The thresholds tend to decrease (increase) at a rate of –2.5 mV/°C for NMOS (or 3 mV/°C for PMOS) transistors. Devices designed for high temperature adjust these thresholds higher to prevent them from going to 0 V at high temperature and allowing excessive current to flow in the off state.
With modifications, Si has good thermal properties, theoretically reaching temperatures of 400ºC, and low-power Si devices have been widely demonstrated to function to 300ºC. Because most applications operate under 300ºC, Si-based technologies dominate the field now and will for many years to come.
It’s also true that packaging and interconnection problems present some of the biggest challenges for electronics at temperatures above 250ºC, often being more of a barrier to successful operation than the intrinsic material issues. Another major issue is the maturity of the manufacturing technology, which for Si is already in place for high-volume, low-cost products.
Si is suitable for power devices running as high as 200ºC. Above that temperature, the choice is less clear. The three main technologies are SiC, GaN, and diamond. The latter two—though superior in performance because they have wider bandgap and lower thermal conductivity—are in such an immature state of development that it will take many years for their importance to equal Si.
In summary, temperature ranges for high-temperature-tolerant electronics can be broken down into three ranges, as shown in Table 3. Market usage is also shown for relative importance.
SOI Technology. Conventional CMOS raw wafer material has intrinsic limitations as temperatures rise over 150ºC. A cost-effective solution is the use of SOI technology. Several facilities now offer SOI material, and the cost of the material is falling as the volume of wafers used increases.
Practical Implications of SOI
• Tests done comparing bulk Si with SOI SRAMs show a 100 times reduction in standby current for the SOI memory.
• SOI has been used as a way to improve speed to get benefits equivalent to the next-generation feature-size reduction.
• Use of this technology greatly reduces leakage current (see Figure 4).
• Because the junction area and thus the capacitance of an SOI device can be reduced significantly, a 15%–20% capacitance reduction can typically be achieved, allowing a commensurate increase in operating frequency.
In SOI designs, manufacturers create transistors by depositing a thin layer of silicon atop a silicon dioxide layer. This isolates the transistors from each other by a trench layer of oxide, which surrounds the transistor like an insulating pocket. The surface silicon layer is thin enough that the junctions of the P- and N-type source and drain implants are bottomed into the oxide, eliminating any bottom side reversed bias junctions. This leaves only channel leakage as the temperature induced leakage mechanism. The bottoming out of the junction also reduces the capacitance of the transistor junctions and reduces crosstalk by as much as 6 dB.
It’s been predicted that because of these benefits (see the sidebar “SOI Offerings,”), SOI technology will eventually become a mainstream player, even in low-temperature semiconductor fabrication (see the sidebar “Practical Implications of SOI,”).
Figure 6 shows a bulk CMOS cross section compared with an SOI CMOS cross section. Note that the vertical dimension is not to scale. With SOI devices, typical lateral dimensions are much larger than the vertical dimensions, and overall junction areas can be reduced as much as 100 times. This reduction translates into lower leakage currents at high temperatures, which allows SOI transistors to easily operate to 300ºC.
Figure 6. A bulk CMOS cross section is compared with an SOI CMOS cross section. Note that the vertical dimension is not to scale. Typically, the ratio of device lateral-to-vertical dimensions in SOI is greater than in bulk CMOS. This results in overall junction areas that can be reduced as much as 100 times. The reduction translates into lower leakage currents at high temperatures and also provides improved radiation resistance because of lower device volume.
Historically, defect densities for SOI starting material have reduced part yield. But recent improvements in the process manufacturing raw wafers have led to lower defect densities, and SOI device production uses the same equipment as conventional components, which makes them easier to produce. Despite these improvements, higher wafer prices and more complex device processing make complete price parity with bulk devices unlikely in the near future.
Figure 7 shows the metal-metal interlayer dielectric leakage current for SOI NMOS transistors over temperature. With SOI, dielectric leakages are not a problem below 300ºC.
Reliability. The factors affecting device reliability for SOI include packaging, oxide integrity, hot electron lifetime, device lifetime, and electromigration.
If properly made and free of defects, gate oxides for SOI devices tend to have a level of reliability similar to that of bulk Si. Studies have shown that the physical mechanism of oxide breakdown doesn’t change significantly up to 400ºC.
Hot electron lifetime—the change in reverse current to decrease to 90% of the original value—has been projected to be >>10 years.
Probably the most significant limiting aspect of an electronic component’s lifetime at high temperature is the ability of the metal films to carry currents for extended periods of time (see Figure 8,). Over years, or even months, with sufficient current density present, metal atoms tend to migrate in an uncontrollable dissipation manner. The dependence of median time to failure on current density is approximated by J–2 (current density). Lifetimes can thus be improved by reducing current density. Manufacturers of high-temperature-tolerant electronics eliminate this issue by using layout rules that allow at most 1/10 the current density of conventional bulk Si design.
The electromigration rate also has an exponential dependence on a metal’s activation energy. Research has shown that the activation energy of a metal is linearly related to its melting temperature. One approach to improving electromigration effects, which is under development at Honeywell, is to use metals with higher melting points (e.g., tungsten). Research done for the Air Force has shown that tungsten films can handle at least 35 times the current of aluminum film. Figure 8 shows the effects of metal migration on lifetime. Unfortunately, tungsten is also prone to corrosion at high temperatures because of the difficulty in finding a suitable passivation coating.
TABLE 3
For now, despite a melting point of 660ºC, aluminum has the best combination of low resistivity, excellent adhesion to oxides/nitrites, high-quality self-passivating oxide, and good reactive-ion etch resolution. Sometimes aluminum is alloyed with another metal having a small amount of low resistivity (e.g., copper).
Figure 7. The plots on the graph show the metal-metal interlayer dielectric leakage current for SOI NMOS transistors over temperature. With SOI, dielectric leakages are not a problem below 300ºC.
Another issue at high temperatures is the increased chemical reactivity of metal to Si junctions. Metals with high electrical conductivity don’t form stable ohmic contacts at semiconductor interfaces. Makers of high-temperature-tolerant electronics solve this problem by using intervening layers of materials, called diffusion barriers, that are chemically neutral to the interconnect metal and the semiconductor contact. To create this barrier, Honeywell typically uses TiW, which prevents a phenomenon called “metal spiking” from occurring. (Metal spiking occurs when aluminum diffuses into the silicon, effectively shorting out the semiconductor. This is a high-temperature/high-current phenomenon that few bulk silicon vendors protect against.)
A significant amount of study is devoted to researching ohmic contacts in SiC, an issue that has slowed this technology from entering volume production. Recent SOI device life testing completed at Honeywell on HTMOS devices—including amplifiers, SRAMs and microcontrollers—has demonstrated a projected MTBF average of 34 years at 225ºC, based on more than 2 million hr. of testing at 250ºC under bias.
Conclusion
Figure 8. This graph shows how current density affects the lifetime of different interconnection traces at elevated temperatures. Each of the curves represents the time to failure (a failure is a 10% increase in trace resistance) of 1% of the interconnection traces in a device. Mil Spec current densities of 5 mA/µ2 in AlCu traces will fail in a matter of months at temperatures above 160°C. High-temperature-tolerant devices using AlCu traces must reduce current densities by a factor of 10 to survive five years. Transitional metals (e.g., tungsten) give longer life at higher current densities.
Market forces are driving the demand for more efficiency and accuracy in monitoring processes and systems containing or operating in high-temperature environments. Modern systems require distributed electronics to achieving adequate performance and accuracy, but conventional components can’t handle the temperatures because of severe derating and thermal wearout.
Silicon’s upper temperature limit can be extended to 300ºC if special fabrication proc essing and design rules are followed in their manufacture. High-temperature-tolerant electronics using SOI processing and modified high-temperature design rules have been demonstrated at temperatures as high as 300ºC. And commercially available components have been developed to achieve reliable long-life operation at these high temperatures. But above 300ºC, no commercial options exist. However, such materials as SiC and GaN are being researched heavily.
Subsequent parts of this multipart series will discuss the other components and materials required to make high-temperature-tolerant electronic systems, including passive components, packaging, and other circuit construction materials. A discussion of system architectures and circuit design techniques, along with some examples, will complete the series.
Jay Goetz is an Applications Engineer, Honeywell SSEC, 12001 Hwy. 55, Plymouth MN 55441.
For inquiries on information or products mentioned in this article, contact Honeywell at 800-323-8295 or visit its Web site at www .ssec.honeywell.com.
